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General design method for complementary pass transistor logic circuits

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dc.contributor.authorAvci, M
dc.contributor.authorYidirim, T
dc.contributor.institutionauthorYILDIRIM, Tülay
dc.date.accessioned2026-06-27T12:57:24Z
dc.date.issued2003
dc.description.abstractA general and effective complementary pass transistor logic design method is presented for pipeline circuits. Existing methods are discussed. A binary decision diagram-based top-down design method with coding, realisation and simplification step is proposed and applied to realise a logic function.en
dc.description.urihttps://doi.org/10.1049/el:20030102
dc.identifier.doi10.1049/el:20030102
dc.identifier.eissn1350-911X
dc.identifier.endpage48
dc.identifier.issn0013-5194
dc.identifier.issue1
dc.identifier.startpage46
dc.identifier.urihttps://hdl.handle.net/20.500.14981/48144
dc.identifier.volume39
dc.identifier.wos000181461300031
dc.language.isoeng
dc.publisherWILEY
dc.relation.ispartofELECTRONICS LETTERS
dc.subjectCMOS
dc.subjectEngineering
dc.titleGeneral design method for complementary pass transistor logic circuits
dc.typeArticle
dspace.entity.typePublication
local.import.sourceWOS

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