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CMOS Differential Amplifier Area Optimization with Evolutionary Algorithms

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dc.contributor.authorVural, Reyna Acar
dc.contributor.authorErkmen, Burcu
dc.contributor.authorBozkurt, Ufuk
dc.contributor.authorYildirim, Tulay
dc.contributor.institutionauthorYILDIRIM, Tülay
dc.date.accessioned2026-06-27T13:28:07Z
dc.date.issued2013
dc.description.abstractThis work presents efficient constrained optimization methods for sizing of a differential amplifier with current mirror load. The aim is to minimize MOS transistor area using three evolutionary algorithms, differential evolution, artificial bee colony algorithm and harmony search. Simulation results demonstrate that proposed methods not only meets design specifications and accommodates required functionalities but also accomplishes the design objective and improves some design specifications in a shorter computational time with respect to previous method.en
dc.identifier.endpage670
dc.identifier.isbn978-988-19253-1-2
dc.identifier.issn2078-0958
dc.identifier.startpage666
dc.identifier.urihttps://hdl.handle.net/20.500.14981/52927
dc.identifier.volumeAo,
dc.identifier.wos000335870300015
dc.language.isoeng
dc.publisherINT ASSOC ENGINEERS-IAENG
dc.relation.conferenceWorld Congress on Engineering and Computer Science
dc.relation.ispartofWORLD CONGRESS ON ENGINEERING AND COMPUTER SCIENCE, WCECS 2013, VOL II
dc.subjectanalog integrated circuit sizing
dc.subjectdifferential evolution
dc.subjectharmony search
dc.subjectartificial bee colony
dc.subjectconstrained optimization
dc.subjectComputer Science
dc.subjectEngineering
dc.titleCMOS Differential Amplifier Area Optimization with Evolutionary Algorithms
dc.typeProceedings Paper
dspace.entity.typePublication
local.import.sourceWOS

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