Neural network based MOS transistor geometry decision for TSMC 0.18μ process technology

Abstract

In sub-micron technologies MOSFETs are modeled by complex nonlinear equations. These equations include many process parameters, terminal voltages of the transistor and also the transistor geometries; channel width (W) and length (L) parameters. The designers have to choose the most suitable transistor geometries considering the critical parameters, which determine the DC and AC characteristics of the circuit. Due to the difficulty of solving these complex nonlinear equations, the choice of appropriate geometry parameters depends on designer's knowledge and experience. This work aims to develop a neural network based MOSFET model to find the most suitable channel parameters for TSMC 0.18 mu technology, chosen by the circuit designer. The proposed model is able to find the channel parameters using the input information, which are terminal voltages and the drain current. The training data are obtained by various simulations in the HSPICE design environment with TSMC 0.18 mu m process nominal parameters. The neural network structure is developed and trained in the MATLAB 6.0 program. To observe the utility of proposed MOSFET neural network model it is tested through two basic integrated circuit blocks.