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Development and implementation of a non-zero suppression system for HGCAL back-end electronics

dc.contributor.authorAkgul, B.
dc.contributor.authorFedar, Y. E.
dc.contributor.authorYuksel, O.
dc.contributor.authorYuksel, F.
dc.contributor.authorErkmen, B.
dc.contributor.authorSakarya, U.
dc.contributor.authorPolat, S. N. Tural
dc.contributor.authorDavid, A.
dc.contributor.authorDauncey, P.
dc.contributor.authorShukla, R.
dc.date.accessioned2026-06-27T15:31:50Z
dc.date.issued2026
dc.description.abstractIn preparation for operations at the HL-LHC, the CMS Collaboration is upgrading its endcap calorimeters with a high granularity calorimeter (HGCAL). The HGCAL back-end electronics includes two Non-Zero Suppression (NZS) boards, which dynamically disable zero-suppression in designated regions of interest. This paper presents a detailed discussion of the principal components of the implemented NZS firmware and a comprehensive account of the hardware testing performed on the Serenity platform, including validation against a Python-based emulator. Each of the 48 DAQ (Data Acquisition) boards of a single endcap receives 432-bit NZS flags, which are generated non-zero-suppression control flags to disable zero suppression for designated regions of interest on the front-end sections and sent via high-speed output channels operating at 25 Gbps. The NZS firmware processes data from six EMTF input links operating at 25 Gbps, and produces the necessary non-zero suppression control flags for real-time selection and spatial mapping of up to 27 muon candidates per bunch crossing under a 360 MHz system clock constraint. To meet the stringent timing requirements, the design adopts a fully pipelined FPGA architecture, enabling deterministic latency while sustaining continuous high-throughput operation.en
dc.description.sponsorshipProject Jet Physics Analyses and HCAL-HGCAL Detector R&D Studies in the CMS Experiment at CERN - TENMAK (Turkiye Enerji, Nuekleer ve Maden Arastimath
dc.description.sponsorshiprma Kurumu) [2023TENMAK, A5.H3.F2-04]
dc.description.sponsorshipYildiz Technical University Scientific Research Projects Coordination Unit [FCD-2024-6434]
dc.description.urihttps://doi.org/10.1088/1748-0221/21/04/c04003
dc.identifier.doi10.1088/1748-0221/21/04/c04003
dc.identifier.eissn1748-0221
dc.identifier.issue4
dc.identifier.urihttps://hdl.handle.net/20.500.14981/71589
dc.identifier.volume21
dc.identifier.wos001738272500001
dc.language.isoeng
dc.publisherIOP Publishing Ltd
dc.relation.conferenceTopical Workshop on Electronics for Particle Physics
dc.relation.ispartofJOURNAL OF INSTRUMENTATION
dc.rightsopenAccess
dc.subjectDigital electronic circuits
dc.subjectSimulation methods and programs
dc.subjectInstruments & Instrumentation
dc.titleDevelopment and implementation of a non-zero suppression system for HGCAL back-end electronics
dc.typeArticle; Proceedings Paper
dspace.entity.typePublication
local.import.sourceWOS

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