Yayın: On an Improved FPGA Implementation of CNN-Based Gabor-Type Filters
| dc.contributor.author | Cesur, Evren | |
| dc.contributor.author | Yildiz, Nerhun | |
| dc.contributor.author | Tavsanoglu, Vedat | |
| dc.date.accessioned | 2026-06-27T13:15:49Z | |
| dc.date.issued | 2012 | |
| dc.description.abstract | In this brief, the details of the architecture of a previously introduced improved field-programmable gate array implementation of the cellular neural network (CNN)-based 2-D Gabor-type filter are given, and the implementation results are discussed. The proposed architecture is suitable for real-time applications with high pixel rates. The prototype is capable of processing video streams up to a pixel rate of 373.2 megapixels per second (MP/s), including full-high-definition (HD) 1080p@60 (1080 x 1920 resolution, 60-Hz frame rate, and 124.4-MP/s visible pixel rate). This brief also contains convergence rate analysis results, along with some discussions on FIR and CNN-based implementation methods. | en |
| dc.description.sponsorship | Scientific and Technological Research Council of Turkey (TUBITAK) [108E023] | |
| dc.description.uri | https://doi.org/10.1109/tcsii.2012.2218471 | |
| dc.identifier.doi | 10.1109/tcsii.2012.2218471 | |
| dc.identifier.eissn | 1558-3791 | |
| dc.identifier.endpage | 819 | |
| dc.identifier.issn | 1549-7747 | |
| dc.identifier.issue | 11 | |
| dc.identifier.startpage | 815 | |
| dc.identifier.uri | https://hdl.handle.net/20.500.14981/51193 | |
| dc.identifier.volume | 59 | |
| dc.identifier.wos | 000313426100024 | |
| dc.language.iso | eng | |
| dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | |
| dc.relation.ispartof | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | |
| dc.subject | Cellular neural networks (CNNs) | |
| dc.subject | field-programmable gate arrays (FPGAs) | |
| dc.subject | Gabor filters | |
| dc.subject | real-time systems | |
| dc.subject | reconfigurable architectures | |
| dc.subject | Engineering | |
| dc.title | On an Improved FPGA Implementation of CNN-Based Gabor-Type Filters | |
| dc.type | Article | |
| dspace.entity.type | Publication | |
| local.import.source | WOS |