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Adaptation of admittance analysis to extract interface traps of a-Si: H/c-Si heterojunctions

dc.contributor.authorMenda, Ugur Deneb
dc.contributor.authorOzdemir, Orhan
dc.date.accessioned2026-06-27T13:42:46Z
dc.date.issued2015
dc.description.abstractComplete admittance expressions, adapted from the equations previously presented for Metal/Oxide/Semiconductor (MOS) structure, were derived and modified admittance approach was successfully applied on a-Si:H/c-Si heterojunction to deduce surface state density (N-ss) by employing capacitancevoltage (C-V) and conductance-voltage (G/omega-V) measurements. Through the approach, N-ss was determined as 6 x 10(12) cm(-2) eV(-1) that was mutually checked by continuum model, used previously for evaluating N-ss in MOS structure. Furthermore, locating such an amount at the interface of a-Si:H and c-Si, experimentally measured C-V curve was reproduced through AFORS-HET simulation program. Presence of such a large amount of N-ss was originated due to native oxide layer, confirmed through spectroscopic elipsometry measurement. (C) 2015 Elsevier Ltd. All rights reserved.en
dc.description.sponsorshipYildiz Technical University [2012-01-01-KAP02, 2012-01-01-DOP03]
dc.description.urihttps://doi.org/10.1016/j.mssp.2015.06.074
dc.identifier.doi10.1016/j.mssp.2015.06.074
dc.identifier.eissn1873-4081
dc.identifier.endpage175
dc.identifier.issn1369-8001
dc.identifier.startpage171
dc.identifier.urihttps://hdl.handle.net/20.500.14981/54361
dc.identifier.volume40
dc.identifier.wos000363344600024
dc.language.isoeng
dc.publisherELSEVIER SCI LTD
dc.relation.ispartofMATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING
dc.subjectAdapted admittance analysis
dc.subjecta-Si:H/c-Si heterostructure
dc.subjectSurface state density
dc.subjectEngineering
dc.subjectMaterials Science
dc.subjectPhysics
dc.titleAdaptation of admittance analysis to extract interface traps of a-Si: H/c-Si heterojunctions
dc.typeArticle
dspace.entity.typePublication
local.import.sourceWOS

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