Low power-four quadrant CMOS analog multiplier for artificial neural networks

Abstract

Artificial Neural Networks (ANN) consist of many neuron and synapse sub circuits which are massively parallel processing elements. The number of transistors and power consumption of the circuits with many synapses are important performance criterion in ANN applications. Analog multipliers have a great importance in analog signal processing. With their specifications of density, speed and low power consumption, they are used in electronic realization of artificial neural networks. In this paper, low power (133muW), four quadrant analog multiplier with a few transistor count is proposed particularly for artificial neural network applications. The circuit was designed using 1.5mun Tubitak-Yital process parameters. The power supply of the circuit is +/-5V. The linear dynamic range of inputs is +/-1V.