ULTRA-LOW VOLTAGE VDBA DESIGN BY USING PMOS DTMOS TRANSISTORS

Abstract

In this study, a new ultra-low voltage and ultra-low power voltage differencing buffered amplifier (VDBA) based on dynamic threshold voltage MOS transistors (DTMOS) is proposed. A voltage mode filter configuration is also presented as an application for the proposed VDBA. This filter employed two VDBA blocks and two passive components. The total power consumption of VDBA block is found simply 6.22 nW at a 0.4 V supply voltage. The simulation results by using LTSpice Program with 0.18 mu m TSMC CMOS technology model parameters are carried out to show the performance of the proposed active device and its filter applications.