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ULTRA-LOW VOLTAGE VDBA DESIGN BY USING PMOS DTMOS TRANSISTORS

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dc.contributor.authorBasak, Muhammed Emin
dc.contributor.authorKacar, Firat
dc.date.accessioned2026-06-27T13:58:47Z
dc.date.issued2017
dc.description.abstractIn this study, a new ultra-low voltage and ultra-low power voltage differencing buffered amplifier (VDBA) based on dynamic threshold voltage MOS transistors (DTMOS) is proposed. A voltage mode filter configuration is also presented as an application for the proposed VDBA. This filter employed two VDBA blocks and two passive components. The total power consumption of VDBA block is found simply 6.22 nW at a 0.4 V supply voltage. The simulation results by using LTSpice Program with 0.18 mu m TSMC CMOS technology model parameters are carried out to show the performance of the proposed active device and its filter applications.en
dc.identifier.issn1303-0914
dc.identifier.issue2
dc.identifier.urihttps://hdl.handle.net/20.500.14981/56182
dc.identifier.volume17
dc.identifier.wos000411067100020
dc.language.isoeng
dc.publisherISTANBUL UNIV, FAC ENGINEERING
dc.relation.ispartofISTANBUL UNIVERSITY-JOURNAL OF ELECTRICAL AND ELECTRONICS ENGINEERING
dc.subjectVDBA
dc.subjectDTMOS
dc.subjectLow Voltage
dc.subjectFilter
dc.subjectDIFFERENCING BUFFERED AMPLIFIER
dc.subjectCMOS OTA
dc.subjectFILTERS
dc.subjectCIRCUITS
dc.subjectCCII
dc.subjectEngineering
dc.titleULTRA-LOW VOLTAGE VDBA DESIGN BY USING PMOS DTMOS TRANSISTORS
dc.typeArticle
dspace.entity.typePublication
local.import.sourceWOS

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